Dynamic Voltage and Frequency Scaling

Clock gating and power gating save power by stopping switching. DVFS goes further: it lowers the supply voltage and the clock frequency together while a block is still running, because dynamic power scales much faster with voltage than with anything else. It is one of the highest-leverage low-power techniques in real SoCs.

Why voltage is the strongest lever

Dynamic power follows P = alpha times C times V squared times f. Frequency is linear, but voltage is squared, so cutting voltage pays off twice. The catch is that a lower voltage makes gates slower, so you cannot keep the same clock. DVFS therefore moves voltage and frequency as a matched pair, called an operating performance point or OPP.

OPP table (illustrative)
  Turbo   1.00 V @ 1.2 GHz   highest performance, highest power
  Nominal 0.90 V @ 0.9 GHz
  Low     0.80 V @ 0.6 GHz   lowest active power

Dynamic power scales with V^2 * f, so dropping
from 1.00 V/1.2 GHz to 0.80 V/0.6 GHz cuts
dynamic power to roughly (0.8/1.0)^2 * (0.6/1.2)
= 0.64 * 0.5 = ~0.32x of the turbo value.

Because lower voltage forces lower frequency, the combined effect on dynamic power is close to cubic over a useful range, which is why DVFS is so effective. But you cannot lower voltage forever: below a point gates become too slow to meet any useful frequency, and leakage starts to dominate, so each domain has a minimum safe operating voltage.

What it takes to build DVFS

• A programmable voltage regulator (PMIC or on-die LDO) that can change the rail for that domain.
• A clock source (PLL or divider) that can re-lock or switch to the new frequency.
• A policy: hardware (DVFS controller) or software (the OS governor) that picks the OPP from workload and temperature.
• Multiple sign-off corners: every voltage/frequency pair the block can run at must be timing-closed, not just the nominal one.
• A refinement is adaptive voltage scaling (AVS): on-chip monitors measure the real silicon speed and trim voltage to the lowest value that still meets frequency, so a fast die runs lower than a slow die and you stop burning fixed guard-band margin.