Back-end path

Static Timing Analysis

STA is how you prove a chip will run at speed without simulating every input. This path builds your timing intuition from the ground up: setup and hold, clock definitions, uncertainty, multicycle and false paths, on-chip variation, and full signoff with PrimeTime.

16
lessons
2 h 47 min
of reading
Intermediate
level
Free
every lesson

Lessons

16 lessons · 2 h 47 min
  1. 01Introduction to STAWhat static timing analysis (STA) is and how it verifies chip timing without simulation: timing paths, setup and hold, slack, clocks, PVT corners, and where STA runs in the flow.12 min
  2. 02Timing Path TypesThe four STA timing path types explained simply: register-to-register, input-to-register, register-to-output and input-to-output, with startpoints, endpoints and how each is constrained.10 min
  3. 03Setup Time, Hold Time & SlackSetup and hold timing checks explained with equations and waveforms: what setup time and hold time are, how slack is computed, and how to fix setup vs hold violations.13 min
  4. 04Clock Domain Crossing (CDC)Clock domain crossing in STA: why asynchronous crossings cause metastability, why STA cannot time them, the two-flop synchronizer, multi-bit bus techniques and CDC verification.11 min
  5. 05On-Chip Variation (OCV, AOCV, POCV)On-chip variation in STA made clear: OCV flat derating, AOCV depth and distance aware derating, and POCV/SOCV statistical timing, with a worked derate example and CRPR.12 min
  6. 06Multi-Mode Multi-Corner (MMMC)MMMC timing analysis explained: operating modes crossed with PVT corners give scenarios, why setup closes at the slow corner and hold at the fast corner, analysed concurrently.11 min
  7. 07Synopsys PrimeTimeSynopsys PrimeTime, the golden signoff STA tool: the flow (netlist, SPEF, SDC, propagated clock, report_timing), PBA, PrimeTime-SI crosstalk, ECO and distributed analysis.9 min
  8. 08Cadence TempusCadence Tempus signoff STA: MMMC views, Quantus parasitics, the report_timing flow, its common flow with Innovus, signal integrity and ECO. PrimeTime’s counterpart.8 min
  9. 09Timing Closure: Fixing Setup & Hold ViolationsHow to fix timing violations in STA: the closure loop, speeding paths up to fix setup, adding delay to fix hold, the setup/hold trade-off, and ECO closure.12 min
  10. 10Latch Time BorrowingLatch time borrowing (time stealing) explained: how level-sensitive latches let a slow stage borrow time from the next, the borrowing limit, a worked example, and where it is used.10 min
  11. 11CRPR / CPPR: Removing Clock PessimismCRPR (CPPR) explained: how OCV double-derates the common clock path, how the common-point credit removes fake pessimism, and why it matters most for hold, with a worked example.10 min
  12. 12Graph-Based vs Path-Based Analysis (GBA vs PBA)GBA vs PBA in STA: graph-based analysis is fast but pessimistic (worst slew per node); path-based analysis re-times real paths to recover margin. When to use each, with a worked example.10 min
  13. 13Crosstalk & Signal IntegrityCrosstalk and signal integrity in STA: coupling capacitance, crosstalk delta delay (same vs opposite direction), noise glitches, fixes (spacing, shielding, NDR), and SI-aware signoff.11 min
  14. 14Recovery and Removal ChecksRecovery and removal checks explained: setup and hold for asynchronous reset release, why reset deassertion is timed while assertion is not, the keep-out window around the clock edge, a worked example, and why reset is synchronized.9 min
  15. 15Minimum Pulse Width CheckMinimum pulse width in STA: why a clock high or low pulse must stay wide enough, how unequal rise and fall delays shrink a pulse across a buffer chain, a worked slack example with uncertainty, and fixes like matched clock buffers and dual inversion.8 min
  16. 16Debugging Unconstrained Timing PathsA practical guide to unconstrained timing paths: why "no constrained paths found" is dangerous, the short list of causes (disabled arcs, set_clock_sense, case analysis, false paths, exclusive clock groups, missing library arcs, clock or delay on a data pin), and the commands to confirm and fix each.11 min