Specialized path
Low Power Design & UPF
Power is a first-class constraint in modern chips. This path covers the techniques that control it: clock gating, multi-threshold cells, power domains and voltage islands, level shifters and isolation, retention registers, power gating with MTCMOS, and capturing it all as UPF power intent.
- 13
- lessons
- 1 h 39 min
- of reading
- Advanced
- level
- Free
- every lesson
Lessons
13 lessons · 1 h 39 min- 01OverviewWhy power is a first-class design constraint in modern chips, and the techniques this path covers, from clock gating to UPF.6 min
- 02Why Low Power MattersWhy battery life, heat and cost make power a design constraint in every modern chip, from phones to data centres.5 min
- 03Clock Gating (ICG)How integrated clock gating (ICG) cells stop the clock to idle registers, the most widely used way to cut dynamic power.8 min
- 04Multi-Threshold Voltage (Multi-Vt)How libraries offer the same cells at several threshold voltages, and how mixing high, standard and low Vt trades leakage for speed.7 min
- 05Power Domains & Voltage IslandsWhat a power domain is, and how voltage islands let blocks run at different voltages or switch off independently.6 min
- 06Level Shifters & Isolation CellsWhy signals crossing voltage domains need level shifters, and why the outputs of a switched-off domain need isolation cells.7 min
- 07Retention RegistersHow retention registers keep their value through power gating with an always-on shadow latch, and when to use them.7 min
- 08Power Gating (MTCMOS)How header and footer switch cells cut the supply to idle blocks, bringing their leakage close to zero.7 min
- 09UPF: Unified Power FormatUPF (IEEE 1801), the standard way to describe power intent: domains, supply nets, power states, isolation, level shifters and retention.9 min
- 10Low Power Interview Questions (Top 15)The low power questions interviewers ask most, with model answers on dynamic and leakage power, clock gating, multi-Vt and UPF.10 min
- 11Dynamic Voltage and Frequency ScalingTrading voltage and frequency at runtime to save power9 min
- 12Power Estimation and AnalysisHow power is computed, and why activity is everything9 min
- 13UPF Power States and the Power State TableDefining legal supply combinations and their strategy9 min