Lesson 5 of 92 minAll levels
Interview Preparation Plan: 8 Weeks
An eight-week interview plan with the topic, what to study and a practice task for every week.
| Week | Topic Focus | What to Study | Practice Task |
|---|---|---|---|
| Week 1 | Digital Fundamentals | Setup/hold time, metastability, clock domains, timing diagrams, flip-flop operation | Draw timing diagrams by hand. Explain setup violation to a friend without notes. |
| Week 2 | Synthesis Concepts | RTL-to-netlist flow, SDC constraints (create_clock, set_input/output_delay, false_path, multicycle_path), QoR metrics (WNS/TNS) | Write a complete SDC file for a simple design from memory. Run Yosys synthesis on a small Verilog module. |
| Week 3 | STA Deep Dive | Setup/hold slack formulas, 4 path types, timing reports, OCV/AOCV, propagated clock, MMMC corners | Manually calculate setup slack for a given circuit. Read a full PrimeTime report and identify violations. |
| Week 4 | Physical Design | Floorplan formulas (utilization, AR), IR drop, CTS (skew/latency/uncertainty), routing DRC rules, Innovus vs ICC2 | Run OpenLane on a UART or I2C controller. Examine floorplan DEF, routing layers, DRC results. |
| Week 5 | Physical Verification | DRC categories, LVS flow, antenna violations, metal fill/density, Calibre commands, ERC checks | Open a Sky130 GDS in KLayout. Identify metal layers. Find a DRC violation and understand which rule it breaks. |
| Week 6 | Advanced Topics | CDC (2FF synchronizer, set_clock_groups), low power (clock gating, multi-Vt, UPF), timing closure ECO flow | Write a CDC synchronizer in Verilog. Simulate it with an asynchronous signal crossing. Verify no metastability. |
| Week 7 | Mock Interviews | Work through all 90 Q&As in this guide. Time yourself. Answer out loud, not just in your head. | Do 3 mock interviews with a peer or use a mirror. Record yourself. Identify weak areas and go back to Week 2-6. |
| Week 8 | Company-Specific Prep | Research target company's products. Know their process node (e.g., TSMC 5nm, Samsung 3nm). Read recent conference papers from their engineers. | Prepare 3-5 intelligent questions to ask the interviewer. Show you understand their specific domain challenges. |
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