Operators You Will Actually Use
logic, arithmetic, and the gotcha pair & vs &&
Verilog has a lot of operators, but day to day you reuse the same handful. Here are the ones that matter, grouped so they are easy to remember.
Bitwise - work on each bit
| Operator | Meaning | Example |
|---|---|---|
| & | AND | a & b |
| | | OR | a | b |
| ^ | XOR | a ^ b |
| ~ | NOT (invert) | ~a |
Logical - give a single true/false
| Operator | Meaning | Example |
|---|---|---|
| && | logical AND | if (a && b) |
| || | logical OR | if (a || b) |
| ! | logical NOT | if (!ready) |
& and && are NOT the same. 8'b0000_0010 & 8'b0000_0001 works bit by bit and gives 0. But (8'b0000_0010 && 8'b0000_0001) treats each side as just true/false and gives 1, because both are non-zero. Use bitwise (&, |) on buses, and logical (&&, ||) inside if conditions.
Comparison and arithmetic
a == b // equal
a != b // not equal
a > b // greater than
a + b // add
a - b // subtract
a * b // multiply (use carefully - costs real hardware)
// Shifts
a << 2 // shift left by 2 (multiply by 4)
a >> 1 // shift right by 1 (divide by 2)The conditional operator - a one-line mux
This is the most useful operator in everyday RTL. It reads as "if condition, pick this, else pick that."
// if sel is 1, y = a, otherwise y = b
assign y = sel ? a : b;
// This describes a 2-to-1 multiplexer in one line.The ternary sel ? a : b is how experienced engineers write small muxes. It is clean, it always describes pure combinational logic, and it never accidentally creates a latch. Reach for it often.
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